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46 SBC622 Hardware Reference Manual
2.3.4 Digital Visual Interface (DVI-D)
The SBC622 supports a Digital Visual Interface that provides a high‐speed digital
connection for visual data types that are display technology independent.
DVI‐D is a display interface developed in response to the proliferation of digital
flat‐panel displays. DVI output is routed to the backplane via P6.
Table 2-2 Partial List of Display Modes Supported for Digital
Resolution
16-bit
640 x 480*
800 x 600
60
1024 x 768
60
1600 x 1200
60, 75, 85, 100
*The Intel Extreme Graphics driver 14.36.3.4990 does not load at 640x480 resolution as set by BIOS.
Default color depth = 4 with no frequency options.
NOTE
Under simultaneous heavy processor and graphics activity with the 1.07 GHz processor option,
video quality may degrade slightly.
2.3.5 XMC/PMC Site Front and Rear Ports
The SBC622 supports the options of dual XMC/PMC sites. Front and rear port
functions are defined by the mezzanine module provisioned in this site.
PMC/XMC sites 1 and 2 are routed to the VPX backplane connectors P3/5, per the
P3w1P4‐P64s+X12d and P5w1P6‐P64s+X12d, standards as defined in VITA 46.9.
2.3.6 SATA Ports
There are five SATA ports. Two SATA channels are routed to the optional NAND
Flash Drive(s). Three SATA channels are routed to P6 and can be accessed using
RTMs which terminate into standard SATA connectors. The SATA interface is
provided by the Intel QM57 Express Chipset Platform Controller Hub. The SATA
interface supports up to four channels.
2.3.7 COM Ports 1 and 2
COM Ports 1 and 2 are routed from the Super IO to P3/4.
2.3.8 PCIe to the Backplane
Sixteen lanes of PCIe are routed to P2 and may be configured as four x4 lane
channels, two x8 lane channels, or a single x16 lane channel. Additionally, one
channel may be configured with a non‐transparent bridging function.
Bits Per Pixel (Frequency) in Hz
32-bit
60
60
60, 75, 85, 100
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