Table 1-5 E501 Xmc2 Nv Memory Write Enable/Disable; Smbus Disable/Enable; Table 1-6 E502 Rtc Reg Clr; Cmos Clr; Table 1-7 E503 Expansion Plane (Pcie) Bus Configuration; Table 1-8 E504 Flash Descriptor Override /Pcie Nt Enable - GE OpenVPX VPXcel6 SBC622 Hardware Reference Manual

26 SBC622 Hardware Reference Manual

Table 1-5 E501 XMC2 NV Memory Write Enable/Disable; SMBus Disable/Enable

E501 Position Not Installed
1-2 NVRAM Memory Write Disable
3-4 SMBus Disable
Note: *When installed, E501 overrides the behavior of the VPX backplane NVMRO signal for the XMC site.

Table 1-6 E502 RTC Reg Clr; CMOS Clr

E502 Position Not Installed
1-2 Factory Set (Not Installed)
3-4 Normal CPU Behavior
Note: E502 is not loaded for conduction-cooled options. Shorting across the pads of R1065 is equivalent to installing
jumper on pins 3-4.

Table 1-7 E503 Expansion Plane (PCIe) Bus Configuration

E503 Function 3-4
1 x8, 2 x4 Ports Open
2 x8 Ports Open
1 x16 Port Shorted
4 x4 Ports Shorted

Table 1-8 E504 Flash Descriptor Override /PCIe NT Enable

E504 Position Not Installed
1-2 Transparent PCIe
3-4 Flash Descriptor Protected
Note: This jumper is used for reprogramming the BIOS in-circuit. During such operations, the jumper is installed
across pins 3-4

Table 1-9 E505 SYSRESET# Control /Onboard Flash Disable

E505 Position Not Installed
1-2 SYSRESET# Disabled
3-4 Onboard Flash Drive(s) Enabled

Table 1-10 E32 RS422 Termination Selection for COM1/COM2

E 32 Position Not Installed
1-2 No COM2 Termination
3-4 No COM1 Termination
Installed
NVRAM Memory Write Enable
SMBus Enable
Installed
Factory Set (Not Installed)
CMOS Clear
1-2
Open
Shorted
Open
Shorted
Installed
Non-Transparent PCIe
Override Flash Descriptor
Installed
SYSRESET# Enabled
Onboard Flash Drive(s) Disabled
Installed
COM2 Termination Installed
COM1 Termination Installed