Hitachi SH7751 Hardware Manual page 34

Tables
Table 1.1 SH7751 Series Features......................................................................................
Table 1.2 Pin Functions......................................................................................................
Table 1.3 Pin Functions......................................................................................................
Table 2.1 Initial Register Values ........................................................................................
Table 3.1 MMU Registers ..................................................................................................
Table 4.1 Cache Features (SH7751)...................................................................................
Table 4.2 Cache Features (SH7751R) ................................................................................
Table 4.3 Store Queue Features .........................................................................................
Table 4.4 Cache Control Registers.....................................................................................
Table 5.1 Exception-Related Registers .............................................................................. 119
Table 5.2 Exceptions .......................................................................................................... 122
Table 5.3 Types of Reset.................................................................................................... 130
Table 6.1 Floating-Point Number Formats and Parameters ............................................... 156
Table 6.2 Floating-Point Ranges ........................................................................................ 157
Table 7.1 Addressing Modes and Effective Addresses ...................................................... 169
Table 7.2 Notation Used in Instruction List ....................................................................... 173
Table 7.3 Fixed-Point Transfer Instructions....................................................................... 174
Table 7.4 Arithmetic Operation Instructions...................................................................... 176
Table 7.5 Logic Operation Instructions.............................................................................. 178
Table 7.6 Shift Instructions ................................................................................................ 179
Table 7.7 Branch Instructions ............................................................................................ 180
Table 7.8 System Control Instructions ............................................................................... 181
Table 7.9 Floating-Point Single-Precision Instructions...................................................... 183
Table 7.10 Floating-Point Double-Precision Instructions .................................................... 184
Table 7.11 Floating-Point Control Instructions.................................................................... 184
Table 7.12 Floating-Point Graphics Acceleration Instructions ............................................ 185
Table 8.1 Instruction Groups.............................................................................................. 194
Table 8.2 Parallel-Executability ......................................................................................... 198
Table 8.3 Execution Cycles................................................................................................ 205
Table 9.1 Status of CPU and Peripheral Modules in Power-Down Modes ........................ 216
Table 9.2 Power-Down Mode Registers............................................................................. 217
Table 9.3 Power-Down Mode Pins .................................................................................... 217
Table 9.4 State of Registers in Standby Mode ................................................................... 226
Table 10.1 CPG Pins ............................................................................................................ 246
Table 10.2 CPG Register...................................................................................................... 246
Table 10.3(1) Clock Operating Modes (SH7751)..................................................................... 247
Table 10.3(2) Clock Operating Modes (SH7751R) .................................................................. 247
Table 10.4 FRQCR Settings and Internal Clock Frequencies .............................................. 248
Table 10.5 WDT Registers................................................................................................... 254
Table 11.1 RTC Pins ............................................................................................................ 265
Table 11.2 RTC Registers .................................................................................................... 265
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