Configuring Clock Synchronization - Huawei SmartAX MA5603T Configuration Manual

SmartAX MA5600T/MA5603T/MA5608T Multi-service
Access Module
Commissioning and Configuration Guide
Log in to the ONU from the OLT, and then configure the port signaling mode of E1 port 0/1/0
to UDT and the transmit clock to system.
huawei(config)#interface tdm 0/1
huawei(config-if-tdm-0/1)#port 0 udt system
huawei(config-if-tdm-0/1)#quit
----End
Follow-up Procedure
After all the configurations are performed successfully, the related information about the CESoP
connection can be queried by running the display cesop-connect command on the ONU.
huawei(config)#display cesop-connect all
------------------------------------------------------------------------------
ID
------------------------------------------------------------------------------
0
------------------------------------------------------------------------------
Total: 1

14.4.4.5 Configuring Clock Synchronization

In this scenario, network-wide clock synchronization is implemented through synchronous
Ethernet clocks.
Prerequisites
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Data Plan
Item
Ethernet upstream
board
Procedure
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Issue 01 (2014-04-30)
PORT VCL ENCAP
ID TYPE
0/1 /0 0 MPLS e024-7f98-a21b
The clock daughter board CKMC/CKMD of the SCU control board is in position.
The Ethernet upstream board is the GICK/GSCA (GE port) or X2CS/SPUF (10GE port)
board.
The upstream MAN PSN of the OLT supports Synchronous Ethernet.
Data
Port: 0/19/0
NOTE
The SPUF board exclusively occupies a service slot. This topic uses the GIU
upstream board as an example.
Configure the OLT-side clock.
1. Configure a system clock source.
Use the Ethernet line clock input from GIU port 0/19/0 as the system clock. Set the
index of the system clock to 0 and priority to 0 (highest priority).
huawei(config)#clock source 0 0/19/0
huawei(config)#clock priority system 0
2. Query the configurations and status of the system clock source.
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