Output Pins - NEC V850E/IA1 mPD703116 User Manual

10.4.5 Output pins

(1) SCKn pin
When the CSIn operation is disabled (CSICAEn bit of CSIMn register = 0), the SCKn pin output status is as
follows (n = 0, 1).
CKP
0
1
Remarks 1. n = 0, 1
2. When any of bits CKP and CKS2 to CKS0 of the CSICn register is overwritten, the SCKn pin
output changes.
(2) SOn pin
When the CSIn operation is disabled (CSICAEn bit of CSIMn register = 0), the SOn pin output status is as
follows (n = 0, 1).
TRMDn DAP
0 Don't care
1 0
1
Remarks 1. n = 0, 1
2. When any of bits TRMDn, CCL, DIRn, and AUTO of the CSIMn register or DAP bit of the
CSICn register is overwritten, the SOn pin output changes.
3. SOTBm: Bit m of SOTBn register (m = 0, 7, 15)
4. SOTBFm: Bit m of SOTBFn register (m = 0, 7, 15)
CHAPTER 10 SERIAL INTERFACE FUNCTION
Table 10-9. SCKn Pin Output Status
CKS2 CKS1
Don't care Don't care
1 1
Other than above
Table 10-10. SOn Pin Output Status
AUTO CCL
Don't care Don't care
Don't care Don't care
0 0
1
1 0
1
User's Manual U14492EJ3V0UD
CKS0 SCKn Pin Output
Don't care Fixed to high level
1 Fixed to high level
Fixed to low level
DIRn
Don't care Fixed to low level
Don't care SO latch value (low level)
0 SOTB7 value
1 SOTB0 value
0 SOTB15 value
1 SOTB0 value
0 SOTBF7 value
1 SOTBF0 value
0 SOTBF15 value
1 SOTBF0 value
SOn Pin Output
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