Precautions - NEC V850E/IA1 mPD703116 User Manual

32-bit single-chip microcontrollers
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(5) Transfer rate during continuous transmission
During continuous transmission, the transfer rate from a stop bit to the next start bit is extended two clocks of
base clock longer than normal. However, on the reception side, the transfer result is not affected since the
timing is initialized by the detection of the start bit.
Figure 10-14. Transfer Rate During Continuous Transmission
Start bit
FL
Representing the 1-bit data length by FL, the stop bit length by FLstp, and the base clock frequency by f
yields the following equation.
FLstp = FL + 2/f
Therefore, the transfer rate during continuous transmission is as follows.
Transfer rate = 11 × FL = 2/f

10.2.7 Precautions

Precautions to be observed when using UART0 are shown below.
(1) When the supply of clocks to UART0 is stopped (for example, IDLE or STOP mode), operation stops with each
register retaining the value it had immediately before the supply of clocks was stopped. The TXD0 pin output
also holds and outputs the value it had immediately before the supply of clocks was stopped. However,
operation is not guaranteed after the supply of clocks is restarted. Therefore, after the supply of clocks is
restarted, the circuits should be initialized by setting UARTCAE0 bit = 0, RXE0 bit = 0, and TXE0 bit = 0 in the
ASIM0 register.
(2) UART0 has a 2-stage buffer configuration consisting of transmission buffer register 0 (TXB0) and the
transmission shift register, and has status flags (TXBF0 and TXSF0 bits of ASIF0 register) that indicate the
status of each buffer. If the TXBF0 and TXSF0 bits are read in continuous transmission simultaneously, their
values change from "10" to "01", but since this change timing is in the period in which data is shifted from TXB0
to the transmission shift register, "11" or "00" may be read, depending on the timing. Thus, read only the
TXBF0 bit during continuous transmission.
CHAPTER 10 SERIAL INTERFACE FUNCTION
1 data frame
Bit 0
Bit 1
FL
FL
CLK
CLK
User's Manual U14492EJ3V0UD
Bit 7
Parity bit
Stop bit
FL
FL
FLstp
Start bit of
second byte
Start bit
Bit 0
FL
FL
445
CLK

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