Panasonic DVC PRO Studio AJ-D950P Service Manual page 407

Vtr/analog video interface kit
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F5 REC PB BLOCK DIAGRAM
SDI(P2-24A~25D)
P2-24A~25D MAIN(7:0)
SDI(P2-22A~23D)
P2-22A~23D
SUB(7:0)
A PROC(P2-15B)
P2-26A
REC DATA 12
A PROC(P2-15C)
P2-26B
REC DATA 34
IC84,85,87<5>
BLK
MAIN
VBI
SDI(P1-8A~9D)
P2-12A~13D MAIN(7:0)
SW
MAIN
V OUT(P2-12C~15A)
IC86,88<5>
BLK
SUB
SDI(P1-6A~7D)
P2-10A~11D SUB(7:0)
SW
SUB
V OUT(P2-10A~12B)
TO V BLK<22/22>
BLK DATA(7:0)
A PROC(P2-19A)
P2-28A
PB DATA 12
A PROC(P2-19B)
P2-28B
PB DATA 34
P2-5C,D
REF CF(1:0)
V-OUT(P2-27B,C)
V-OUT(P2-27A)
P12-6B
REF FRM
V-OUT(P2-26A)
P12-6A
REF H
IC11<9>
SDI(P2-8C,D)
VOUT(P2-25A,B)
P2-4C,D
IN CF(1:0)
V OUT(P2-24C)
P2-5B
IN FRM
SDI(P2-9B)
V OUT(P2-25C)
P2-5A
IN H
SEL
SDI(P2-9A)
SDI(P1-18D)
P1-18D
DIF CF
SDI(P1-18C)
P1-18C
DIF FRM
SDI(P1-18B)
P1-18B
DIF H
SYSCON(P1-27B~29C)
P1-28A~29D
AV DATA(7:0)
SYSCON(P1-23C~26A)
P1-25A~26D
AV ADRS(10:0)
M1613
(DV µCON SECTION)
CLK27(2)
SYS CF(1:0)
M16 DATA R
/M16 CLK R
ADR(15:0)
CLK27(3)
M16 DATA P/M16 CLK P
ADR REC(15:0)
ADR PB(15:0)
IC803<3>
M16 DATA REC
M16 CLK REC
DAT A(7:0)
PRO-PROCESS
A DATA 12
REC
•SHUFFLING
•C FILTER
FRP27
DAT B(7:0)
CLK27(0)
CLK18(0)
BLK DAT(5:0)
CLK18 OUT
IC73<4>
IC73<4>
IC26<10>
SHUF MEM
SHUF MEM
A REC
B REC
A DATA 12
A DATA 34
BUFF
M16 DATA PB
M16 CLK PB
IC802<5>
PRO-PROCESS
PB
•SHUFFLING
CLK18(1)
CLK27(1)
DAT B(7:0)
BLK DAT(5:0)
IC80<6>
IC81<6>
IC29<11>
SHUF MEM
SHUF MEM
A PB
B PB
A DAT 12
A DDT 34
BUFF
IC10<9>
IC14<9>
REC VD
FRU
REC HD
REC H
H
REC V
REC FRP
SEL
REC FRM
FRM 27 REC
X1<9>
CLK27(4:0)
27M
BUFF
VCO
SYS CF(1:0)
CLK18(2)
CLK27(4:0)
IC1
IC50<20>
IC47,IC21
<8>
AV ADR5(8:0)
DUAL
AV DAT5(7:0)
DV-µCOM
PORT
REC
RAM
AV IF
M16(2:0)
AV DAT3(7:0)
AV ADR3(7:0)
IC1
IC65<21>
DUAL
DV-µCOM
PORT
PB
RAM
IC22<10>
M16 DATA REC
M16 CLK REC
CAS R A
CAS A R
•COMPRESSION
•AUDIO PROCESS
CAS B R
IC23<10>
CAS R B
CLK18(2)
M16 DATA REC
•COMPRESSION
M16 CLK REC
•AUDIO PROCESS
A DATA 34
M16 DATA PB
M16 CLK PB
IC27<11>
DAT A(7:0)
CLK18(5)
CAS PB A
•UNCOMPRESSION
CAS A(3:0)
•AUDIO PROCESS
A DAT A
IC28<11>
CAS B(3:0)
CAS PB B
CLK18(3)
•UNCOMPRESSION
•AUDIO PROCESS
A DAT B
BLK DAT(5:0)
VBI DAT(7:0)
IC9<9>
IC7<9>
BUFF
EDA CLK 18
ADR REC(15:0)
IC129,<17>
IC39<7>
IC130<17> IC121,IC122<17>
V DATA
CC PROCESS
SHTL
•DATA SEL
BUFF MEM
M16 DATA PB
M16 CLK PB
VLK SUB PCB
IC200<12>
IC90<12>
CLK 18(4)
MIX A
A R
CAS A
MUX
MIX B
FORMAT 1 R
B R
OPEN
CAS B
•AUDIO CHANNEL
HEAD ALIGNMENT
IC91<12>
•EXTRA LINE
DATA INSERT
OPEN
MUX
BLK DATA(5:0)
IC201<13>
EE1<14>
EE BUS 0(3:0)
EE BUS IN(3:0)
FORMAT 1 PB
IC97,IC99-
IC103
•AUDIO CHANNEL
HEAD ALIGNMENT
•EXTRA LINE
DATA INSERT
EDA A P(3:0)
EDA B P(3:0)
CLK18(5:0)
BUFF
CLK18 P
EDA CSP BOARD<18>
IC1(2)
REC DAT A R
PB DAT A R
EDA R A
CLK 18 R
IC2<1>
•ECC
•DESHUFFLING
M16 AD R
ECC
MEMORY
IC3(2)
REC DAT B R
PB DAT B R
EDA R B
BUS AR(3:0)
IC4<1>
•ECC
•DESHUFFLING
BUS BR(3:0)
ECC
MEMORY
IC10(3)
PB DAT A P
EDA PB A
IC11
•ECC
•DESHUFFLING
BUS A P(3:0)
ECC
MEMORY
IC12(3)
BUS B P(3:0)
PB DAT B P
EDA PB A
IC13
•ECC
•DESHUFFLING
ECC
MEMORY
M16 AD P(15:0)
ADR PB(15:0)
M16 DATA REC
M16 CLK REC
EDA A R(3:0)
EDA B R(3:0)
EE BUS(3:0)
IC92<12>
D RAM
IC801<15>
M16 DATA REC
M16 CLK REC
L REC DATA(1:0)
P1-6A,B
R REC DATA(1:0)
P1-6C,D
FORMAT 2 R
REC CLK(1:0)
P1-7A,B
L PB DATA R(1:0)
P1-9C,D
•TRANSMISSION
R PB DATA R(1:0)
P1-10C,D
CONVERT
L PB CLK R(1:0)
P1-10A,B
R PB CLK R(1:0)
P1-11A,B
IC109,IC111
FIFO
IC800<16>
P1-11C,D
L PB DATA L(1:0)
P1-12C,D
R PB DATA P(1:0)
P1-12A,B
L PB CLK P(1:0)
P1-13A,B
R PB CLK P(1:0)
FORMAT 2 P
•TRANSMISSION
CONVERT
IC117,IC118
M16 CLK PB
FIFO
M16 DATA PB
X CAN(P1-21C,22A)
X CAN(P1-22B,C)
X CAN(P1-23A,B)
X CAN(P1-24C,25A)
X CAN(P1-26A,B)
X CAN(P1-25B,C)
X CAN(P1-26C,27A)
X CAN(P1-27B,C)
X CAN(P1-28C,29A)
X CAN(P1-28A,B)
X CAN(P1-29B,C)

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