Figure 3-8 Sixteen-Bit Compatibility Mode, Memory Switch Enabled - Motorola DSP56305 User Manual

24-bit digital signal processor
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Program
$FFFF
$1E00
$1A00
Internal Program
$0000
Program
RAM: 6.5 K
$0000–$19FF
Note:
This column gives the maximum memory addressable in the memory space.
Figure 3-8 Sixteen-Bit Compatibility Mode, Memory Switch Enabled, Instruction Cache
Enabled
MOTOROLA
SC = 1, MS = 1, CE = 1
External
$FFFF
$FF80
Instruction
Cache
1 K
$0B00
RAM
6.5 K
$0000
Memory Configuration
X Data
RAM: 2.75 K
$0000–$0AFF
DSP56305 User's Manual
X Data
Internal I/O
$FFFF
128 words
$FFC0
External
Internal
X data RAM
2.75 K
Y Data
RAM: 2 K
$0000–$07FF
$1A00–$1DFF
Memory Configuration
Memory Maps
Y Data
External I/O
128 words
Internal I/O
$FF80
64 words
External
$0800
Internal
Y data RAM
$0000
2 K
Max.
Cache
*
Mem.
1 K
64 K
3-19

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