Motorola DSP56305 User Manual page 5

3.4 MEMORY MAPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3.5 INTERNAL AND EXTERNAL I/O MEMORY MAP . . . . . . . . . . 3-20
SECTION 4
4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4.2 OPERATING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4.3 BOOTSTRAP PROGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
4.3.1 Mode 0: Expanded Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
4.3.2 Modes 1-3: Bootstrap According to RTOS Mode . . . . . . . . . 4-7
4.3.3 Modes 4-7: Reserved . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
4.3.4 Mode 8: Expanded Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
4.3.5 Mode 9: Bootstrap From Byte-Wide External Memory . . . . . 4-8
4.3.6 Mode A: Bootstrap Through SCI . . . . . . . . . . . . . . . . . . . . . . 4-8
4.3.7 Mode B: Bootstrap Through HI32 in 24-Bit-Wide UB Mode
(From 563xx Port A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
4.3.8 Mode C: Bootstrap through HI32 in PCI mode . . . . . . . . . . . 4-9
4.3.9 Mode D: Bootstrap Through HI32 in 16-Bit-Wide UB Mode
(ISA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
4.3.10 Mode E: Bootstrap Through HI32 in 8-Bit-Wide UB Mode in
Double-Strobe Pin Configuration . . . . . . . . . . . . . . . . . . . . . 4-10
4.3.11 Mode F: Bootstrap Through HI32 in 8-Bit-Wide UB Mode in
Single-Strobe Pin Configuration . . . . . . . . . . . . . . . . . . . . . 4-11
4.4 RTOS PROGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
4.5 INTERRUPT SOURCES AND PRIORITIES . . . . . . . . . . . . . . 4-11
4.5.1 Interrupt Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12
4.5.2 Interrupt Priority Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
4.5.3 Interrupt Source Priorities Within an IPL . . . . . . . . . . . . . . . 4-17
4.6 DMA REQUEST SOURCES . . . . . . . . . . . . . . . . . . . . . . . . . . 4-20
4.7 OPERATING MODE REGISTER (OMR) . . . . . . . . . . . . . . . . . 4-22
4.7.1 Address Tracing Enable (ATE)-OMR Bit 15 . . . . . . . . . . . 4-22
4.8 PLL CONTROL REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23
4.8.1 PLL Multiplication Factor (MF11:0)-PCTL Bits 0-11 . . . . . 4-23
4.8.2 Crystal Range (XTLR)-PCTL Bit 15 . . . . . . . . . . . . . . . . . 4-23
4.8.3 XTAL Disable (XTLD)-PCTL Bit 16 . . . . . . . . . . . . . . . . . . 4-24
4.8.4 PreDivider Factor Bits (PD3:0)-PCTL Bits 20-23 . . . . . . . 4-24
4.9 DEVICE IDENTIFICATION REGISTER . . . . . . . . . . . . . . . . . . 4-24
MOTOROLA
CORE CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . 4-1
DSP56305 User's Manual iii