Operating Modes; Introduction - Motorola DSP56305 User Manual

4.1

INTRODUCTION

This chapter contains DSP56300 core configuration details specific to the DSP56305.
These configuration details include:

• Operating modes

• Bootstrap program
• Interrupt sources and priorities
• DMA request sources
• Operating Mode Register (OMR)
• PLL control register (PCTL)
• Device Identification Register (IDR)
• JTAG Device Identification Register (ID)
• JTAG Boundary Scan Register (BSR)
For more information on specific registers or modules in the DSP56300 core, refer to the
DSP56300 Family Manual (DSP56300FM/AD).
4.2 OPERATING MODES
The DSP56305 begins operations by leaving Reset and going into one of eight operating
modes. As the DSP56305 exits the Reset state it loads the values of MODA, MODB,
MODC, and MODD into bits MA, MB, MC, and MD of the Operating Mode Register
(OMR). These bit settings determine the chip's operating mode, which determines what
bootstrap program option the chip uses to start up.
The MA–MD bits of the OMR can also be set directly by software. Jumping directly to
the bootstrap program entry point ($FF0000) after setting the OMR bits causes the
DSP56305 to execute the specified bootstrap program option (except modes 0 and 8).
Table 4-1 shows the DSP56305 bootstrap operation modes, the corresponding settings of
the external operational mode signal lines (the mode bits MA–MD in the OMR), and the
reset vector address to which the DSP56305 jumps once it leaves the Reset state.
MOTOROLA DSP56305 User's Manual
Core Configuration
Introduction
4-3