Sixteen-Bit Compatibility Mode Configuration; Ram Configuration Summary; Dsp56303 Ram Configurations; Dsp56303 Ram Address Ranges By Configuration - Motorola DSP56303 User Manual

24-bit digital signal processor
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Sixteen-Bit Compatibility Mode Configuration

3.5
Sixteen-Bit Compatibility Mode Configuration
The sixteen-bit compatibility (SC) mode allows the DSP56303 to use DSP56000 object code
without change. The SC bit (Bit 13 in the SR) is used to switch from the default 24-bit mode
to this special 16-bit mode. SC is cleared by reset. You must set this bit to select the SC mode.
The address ranges described in the previous sections apply in the SC mode with regard to the
reallocation of X and Y data memory to program memory in MS mode, but the maximum
addressing ranges are limited to $FFFF, and all data and program code are 16 bits wide.
3.6

RAM Configuration Summary

The RAM configurations for the DSP56303 are listed in Table 3-1.
Bit Settings
MS
0
0
1
1
The actual memory locations for Program RAM and the Instruction Cache in the Program
memory space are determined by the MS and CE bits, and their addresses are given in Table
3-2.
Table 3-2. DSP56303 RAM Address Ranges by Configuration
MS
CE
0
0
0
1
1
0
1
1
3-6
Table 3-1. DSP56303 RAM Configurations
CE
Program RAM
0
4
1
3
0
2
1
1
Program RAM Location
$000–$FFF
$000–$BFF
$000–$7FF
$000–$3FF
DSP56303 User's Manual
Memory Sizes (in K)
X data RAM
Y data RAM
2
2
3
3
Cache Location
$C00–$FFF (internal location not accessible; address range
assigned to external Program Memory)
$400–$7FF (internal location not accessible; addressed
assigned to external Program Memory)
Cache
2
0
2
1
3
0
3
1
N/A
N/A

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