Table 3-3 Memory Space Configurations For The Dsp56305; Memory Space Configurations; Table 3-4 Ram Configurations For The Dsp56305 - Motorola DSP56305 User Manual

Memory Configuration
Memory Configurations
3.3 MEMORY CONFIGURATIONS
Memory configuration determines the size and address range for addressable memory,
and the amount of memory allocated to Program RAM, data RAM, and the Instruction
Cache.
3.3.1

Memory Space Configurations

The memory space configurations are listed in Table 3-3.

Table 3-3 Memory Space Configurations for the DSP56305

SC Bit
Setting
0
1
3.3.2 RAM Configurations
The RAM configurations for the DSP56305 are listed in Table 3-4.

Table 3-4 RAM Configurations for the DSP56305

Bit Settings
MS
0
0
1
1
The actual memory locations for Program RAM and the Instruction Cache in the
program memory space are determined by the MS and CE bits, and their addresses are
given in Table 3-5.
3-10
Addressable
Address Range
Memory Size
16 M words $000000–$FFFFFF
64 K words $0000–$FFFF
Memory Sizes (in K)
Program
CE
RAM
0 6.5
1 5.5
0 7.5
1 6.5
DSP56305 User's Manual
Bits per Word
X data Y data
RAM RAM
3.75 2.0
3.75 2.0
2.75 2.0
2.75 2.0
24
16
Cache
0
1
0
1
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