Motorola DSP56305 User Manual page 208

HOST INTERFACE (HI32)
HOST SIDE Programming Model
• If HTF = $1 or $2:
The three least significant PCI data bytes from the HAD23-HAD0 signals are
transferred to the three least significant HTXR bytes and transferred to the DRXR
to be read by the DSP56300 core.
• If HTF = $3:
The three most significant PCI data bytes from the HAD31-HAD8 signals are
transferred to the three least significant HTXR bytes and transferred to the DRXR
to be read by the DSP56300 core.
Universal Bus mode host to DSP data transfer formats (HM = $2 or $3):
• If HTF = $0:
The 24-bit data from HD23-HD0 data signals is transferred to the three least
significant HTXR bytes and transferred to the DRXR to be read by the DSP56300
core.
• If HTF = $1:
The 16-bit data from HD15-HD0 data signals is transferred to the three least
significant HTXR bytes as right aligned and zero extended and transferred to the
DRXR to be read by the DSP56300 core.
• If HTF = $2:
The 16-bit data from HD15-HD0 data signals is transferred to the three least
significant HTXR bytes as right aligned and sign extended and transferred to the
DRXR to be read by the DSP56300 core.
• If HTF = $3:
The 16-bit data from HD15-HD0 data signals is transferred to the three least
significant bytes of the HTXR, as left aligned, the least significant byte is zero
filled and transferred to the DRXR to be read by the DSP56300 core.
To assure proper operation:
• HTF1-HTF0 may be changed only if the host-to-DSP data path is empty.
• Switching between 32-bit data modes and non-32-bit data modes may be done
only in the personal software reset state (HM = $0 and HACT = 0).
• If the HTF1-HTF0 value is not equal to the value of the FC1-FC0 bits in the DPMC:
PCI transactions that start in the non-data address space (i.e. the PCI address is
less than HI32_base_address:$007) should not extend into the data address space.
The personal hardware reset clears HTF1-HTF0.
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