Motorola DSP56305 User Manual page 78

24-bit digital signal processor
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Signal/Connection Descriptions
Host Interface (HI32)
Signal Name
Type
HC0–HC3/
Input/
HBE0–HBE3
Output
HA0–HA2
Input
PB16–PB19
Input or
Output
HTRDY
Input/
Output
HDBEN
Output
PB20
Input or
Output
2-20
Table 2-10 Host Interface (Continued)
State
During
Reset
Tri-stated
Host Command 0–3/Host Byte Enable 0–3—When
the HI32 is programmed to interface a PCI bus and
the HI function is selected, these signals are lines
0–7 of the bidirectional, multiplexed
Address/Data bus.
Host Address 0–2—When HI32 is programmed to
interface a universal non-PCI bus and the HI
function is selected, these signals are lines 0–2 of
the input Address bus.
Note:
Port B 16–19—When the HI32 is configured as
GPIO through the DCTR, these signals are
individually programmed as inputs or outputs
through the HI32 DIRH.
These inputs are 5 V tolerant.
Tri-stated
Host Target Ready—When the HI32 is
programmed to interface a PCI bus and the HI
function is selected, this is the Host Target Ready
signal.
Host Data Bus Enable—When HI32 is
programmed to interface a universal non-PCI bus
and the HI function is selected, this signal is Host
Data Bus Enable output.
Port B 20—When the HI32 is configured as GPIO
through the DCTR, this signal is individually
programmed as an input or output through the
HI32 DIRH.
This input is 5 V tolerant.
DSP56305 User's Manual
Signal Description
The fourth signal in this set should be connected to a
pull-up resistor or directly to V
non-PCI bus.
when using a
CC
MOTOROLA

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