Host Slave Receive Data Register (Hrxs) - Motorola DSP56305 User Manual

24-bit digital signal processor
Table of Contents

Advertisement

6.6.4

Host Slave Receive Data Register (HRXS)

The HRXS is the output stage of the slave DSP-to-host data path FIFO used for
DSP-to-host data transfers. The HRXS cannot be accessed by the DSP56300 core.
The HRXS contains valid data when the HRRQ bit is set. Emptying the HRXS by host
processor reads clears HRRQ.
The HRXS transfers the data to the HI32 data signals via the data transfer format
converter (HDTFC). The value of the HRF bits in the HCTR define which bytes of the
HRXS are output to the signals and their alignment. (See Section 6.5.9 and Section 6-16).
In PCI mode (HM = $1) memory space read transaction, the HRXS is accessed if the PCI
address is between HI32_base_address: $01C and HI32_base_address: $FFFC.
In the PCI mode (HM = $1), HRXS is viewed by the host processor as a 16377 Dword
read-only memory.
In PCI DSP-to-host data transfers via the HRXS, all four byte lanes are driven with data,
in accordance with HRF1-HRF0 bits, regardless of the value of the byte enable signals
(HC3/HBE3-HC0/HBE0).
When in a Universal Bus mode (HM = $2 or $3), the HRXS is accessed if the HA10-HA3
value matches the HI32 base address (CBMA, see Section 6.6.11) and the HA2-HA0
value is $7.
In a 24-bit data Universal Bus mode (HM = $2 or $3 and HRF = $0), the HRXS is viewed
by the host processor as a 24-bit read-only register. HD23-HD0 signals are driven with
all three bytes of the HRXS in a read access.
In a 16-bit data Universal Bus mode (HM = $2 or $3 and HRF≠$0), the HRXS is viewed
by the host processor as a 16-bit read-only register. In a read access, the HD15-HD0
signals are driven with data from the two most significant bytes or two least significant
bytes of the HRXS, as defined by the HRF bits in the HCTR.
When HRRQ is set and RREQ in the HCTR is set:
• the HREQ status bit will be set in the HSTR.
• the HIRQ signal will be asserted - if DMAE is cleared (in the Universal Bus
modes)
• the HDRQ signal will be asserted - if DMAE is set (in the Universal Bus modes)
MOTOROLA
DSP56305 User's Manual
HOST INTERFACE (HI32)
HOST SIDE Programming Model
6-75

Advertisement

Table of Contents
loading

Table of Contents