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Serial Communication Interface (SCI)
GPIO Signals and Registers
7
6
15
14
23
22
Reserved Bit, Read as 0, Should be Written with 0 for Future Compatibility
Note:
Hardware and software reset clear all PCRE bits.
8.5.2
Port E Direction Register (PRRE)
The read/write 24-bit PRRE controls the direction of SCI GPIO signals. When port
signal[i] is configured as GPIO, PDC[i] controls the port signal direction. When PDC[i] is
set, the GPIO port signal[i] is configured as output. When PDC[i] is cleared the GPIO
port signal[i] is configured as input.
7
6
5
13
15
14
21
23
22
Reserved Bit, Read as 0, Should be Written with 0 for Future Compatibility
Note:
Hardware and software reset clear all PRRE bits.
8-30
5
4
3
2
PC2
PC1
13
12
11
10
21
20
19
18
17
Figure 8-9 Port E Control Register (PCRE)
4
3
2
1
PDC2
PDC1
12
11
10
9
20
19
18
17
Figure 8-10 Port E Direction Register (PRRE)
DSP56305 User's Manual
1
0
PC0
Port Control Bits: 1 = SCI
9
8
16
0
PDC0
Direction Control Bits: 1 = Output
8
16
0 = GPIO
AA0695
0 = Input
AA0696
MOTOROLA
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