Mitsubishi Electric MELSEC iQ-R Series User Manual page 98

■Operation when a cycle skip occurs
The phenomena that D/A conversion is not processed within an inter-module synchronization cycle due to the operation
timing of the inter-module synchronous interrupt program (I44) is called "cycle skip". When a cycle skip has occurred, an inter-
module synchronization cycle skip error (error code: 2601H) occurs. The operation of the D/A converter module stops when
an error occurs regardless of the setting of 'Output setting during synchronization error' (Un\G9532). Analog values are output
according to the analog HOLD/CLEAR setting.
Inter-module
synchronization cycle
Inter-module synchronous
interrupt program
'CH1 Synchronization
digital value' (Un\G9500)
Analog output value
in CH1
'Synchronization status
monitor' (Un\G9600)
Inter-module synchronous interrupt program (I44)
(1) A cycle skip occurs since no D/A conversion has been processed within an inter-module synchronization cycle.
(2) An inter-module synchronization cycle skip error (error code: 2601H) occurs in the next inter-module synchronization cycle, and analog values are output
according to the analog HOLD/CLEAR setting.
When a cycle skip has occurred, follow the methods below to resolve the issue.
• Interrupt disable (EI instruction unexecuted) may be set. Execute the EI instruction in the main program and
enable an interrupt.
• The possible cause is that the execution time for an inter-module synchronous interrupt program (I44) is
longer for the inter-module synchronization cycle. Correct settings such as setting a longer inter-module
synchronization cycle or reducing the number of steps of the inter-module synchronous interrupt program
(I44).
If the error occurs again even after the above actions are taken, the possible cause is a failure of the module.
Please consult your local Mitsubishi representative.
1 FUNCTIONS
96
1.15 Inter-Module Synchronization Function
Inter-module synchronization cycle
1A
D/A D/A
conversion conversion
Analog output value of 1A
Inter-module synchronization target
(during synchronization) (2)
(1) (2)
D/A
conversion
Analog output value while the
synchronization is being stopped
Inter-module synchronization target
(synchronization stopped) (1)
2A