Mitsubishi Electric MELSEC iQ-R Series User Manual page 162

High speed digital-analog converter module
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Condition target setting [n]
Normal
Set an interrupt factor to be detected.
Setting value
0
1
2
3
4
• If a value other than the above is set, a condition target setting range error (error code: 181H) occurs.
• When a condition set in 'Condition target setting [n]' (Un\G232 to Un\G247) is satisfied, an interrupt request is sent to the
CPU module. The interrupt condition for each setting value is shown below.
Setting value
Disable
Error flag
Warning output flag
Disconnection detection flag
External power supply READY flag
"n" indicates an interrupt setting number. (n = 1 to 16)
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
Condition target setting [n]
■Enabling the setting
Turn on and off 'Operating condition setting request' (Y9).
■Default value
The default value is Disable (0) for all areas.
APPX
160
Appendix 3 Buffer Memory Areas
Wave
Description
An interrupt detection is not performed.
A rise is detected at the timing of when 'Error flag' (XF) turns on.
A rise is detected at the timing of when the corresponding bit of 'Warning output upper flag' (Un\G36) or 'Warning
output lower flag' (Un\G37) turns on (A channel is specified).
A rise is detected at the timing of when the corresponding bit of 'Disconnection detection flag' (Un\G38) turns on
(A channel is specified).
A fall is detected at the timing of when 'External power supply READY flag' (X7) turns off.
1
2
3
4
5
232
233
234
235
236
Synchronization
Setting details
Disable
Error flag (XF)
Warning output flag
Disconnection detection flag
External power supply READY flag (X7)
6
7
8
9
237
238
239
240
10
11
12
13
14
241
242
243
244
245
15
16
246
247

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