D-Link DGE-560SX User Manual page 134

Gigabit fiber (lc) pci express server adapter
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B7
CPU GPR
Group C: Miscellaneous Tests
C1
NVRAM
C2
CPU
C3
DMA
C4
MII
AA55AA55 Fills the entire host DMA buffer with
data 0xAA55AA55.
55AA55AA Fills the entire host DMA buffer with
data 0x55AA55AA.
This test tests the CPU General Purpose registers and performs in
the same way as the Scratch Pad Test (B1) over 3 different
voltages (1.1V, 1.2V, and 1.3V).
Incremental test data is used in the electrically erasable
programmable read-only memory (EEPROM) test. The test fills
the test range with test data and reads the data back to verify the
content. Afterwards, the test fills the test range with 0s to clear
the memory.
This test opens the Cpu.bin file. If the file exists and content is
good, the test loads code to the RX CPU and TX CPU and verifies
the CPU execution.
This test tests both high-priority direct memory access (DMA)
and low-priority DMA. The test moves data from the host
memory to the adapter SRAM and verifies the data. The test then
moves data back to the host memory to again verify the data.
The medium independent interface (MII) test function is identical
to that of the Control Register Test (A2). Each register specified
in the configuration contents defines the read-only and
read/write bits. The test writes 0s and 1s to the test bits to
ensure that the read-only bit values are not changed and that the
read/write bits are changed.
The test attempts to read the register configuration file
(Miireg.txt) for the register definitions. If the file does not exist,
the following table is used:
Offset Read-Only Mask Read/Write Mask
0x00
0x0000
0x02
0xFFFF
0x03
0xFFFF
0x04
0x0000
0x05
0xEFFF
0x06
0x0001
0x07
0x0800
134
D-Link DGE-560SX User Guide
0x7180
0x0000
0x0000
0xFFFF
0x0000
0x0000
0xB7FF

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