Philips Semiconductors
Volume 1
22.7 Block diagram
The block diagram of the ETM debug environment is shown below in
User manual
TRACE
PORT
ANALYZER
Host
running
JTAG
debugger
INTERFACE
LAN
Fig 59. ETM debug environment block diagram
Rev. 01 — 24 June 2005
CONNECTOR
10
CONNECTOR
5
UNIT
UM10120
Chapter 22: Embedded Trace
Figure
APPLICATION PCB
TRACE
ETM
TRIGGER
PERIPHERAL
PERIPHERAL
ARM
EMBEDDEDICE
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
59.
RAM
ROM
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