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Philips Semiconductors
Volume 1
21.6 Register description
The EmbeddedICE logic contains 16 registers as shown in
ARM7TDMI-S debug architecture is described in detail in "ARM7TDMI-S (rev 4) Technical
Reference Manual" (ARM DDI 0234A) published by ARM Limited and is available via
Internet at http://www.arm.com.
Table 221: EmbeddedICE logic registers
Name
Debug Control
Debug Status
Debug Comms Control Register
Debug Comms Data Register
Watchpoint 0 Address Value
Watchpoint 0 Address Mask
Watchpoint 0 Data Value
Watchpoint 0 Data Mask
Watchpoint 0 Control Value
Watchpoint 0 Control Mask
Watchpoint 1 Address Value
Watchpoint 1 Address Mask
Watchpoint 1 Data Value
Watchpoint 1 Data Mask
Watchpoint 1 Control Value
Watchpoint 1 Control Mask
21.7 Block diagram
The block diagram of the debug environment is shown below in
User manual
Serial
parallel
interface
Host
running
debugger
Fig 58. EmbeddedICE debug environment block diagram
Rev. 01 — 24 June 2005
Width Description
6
Force debug state, disable interrupts
5
Status of debug
32
Debug communication control register
32
Debug communication data register
32
Holds watchpoint 0 address value
32
Holds watchpoint 0 address mask
32
Holds watchpoint 0 data value
32
Holds watchpoint 0 data mask
9
Holds watchpoint 0 control value
8
Holds watchpoint 0 control mask
32
Holds watchpoint 1 address value
32
Holds watchpoint 1 address mask
32
Holds watchpoint 1 data value
32
Holds watchpoint 1 data mask
9
Holds watchpoint 1 control value
8
Holds watchpoint 1 control mask
JTAG PORT
EMBEDDEDICE
5
INTERFACE
PROTOCOL
CONVERTER
TARGET BOARD
UM10120
Chapter 21: EmbeddedICE
Table 221
below. The
Figure
58.
EMBEDDED
ICE
ARM7TDMI-S
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Address
00000
00001
00100
00101
01000
01001
01010
01011
01100
01101
10000
10001
10010
10011
10100
10101
239
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