Philips LPC213 Series User Manual page 100

Philips Semiconductors
Volume 1
Table 94:
Bit
0
1
2
3
7:4
[1]
10.3.6 UART1 Interrupt Identification Register (U1IIR - 0xE001 0008, Read
Only)
The U1IIR provides a status code that denotes the priority and source of a pending
interrupt. The interrupts are frozen during an U1IIR access. If an interrupt occurs during
an U1IIR access, the interrupt is recorded for the next U1IIR access.
Table 95:
Bit
0
User manual
UART1 Interrupt Enable Register (U1IER - address 0xE001 0004, when DLAB = 0)
bit description
Symbol Value
RBR
Interrupt
Enable
0
1
THRE
Interrupt
Enable
0
1
RX Line
Interrupt
Enable
0
1
Modem
Status
Interrupt
0
[1]
Enable
1
-
Available in LPC2134/6/8 only. In all other LPC213x parts this bit is Reserved.
UART1 Interrupt Identification Register (U1IIR - address 0xE001 0008, read only)
bit description
Symbol Value
Interrupt
Pending
0
1
Rev. 01 — 24 June 2005
Description
U1IER[0] enables the Receive Data Available
interrupt for UART1. It also controls the Character
Receive Time-out interrupt.
Disable the RDA interrupts.
Enable the RDA interrupts.
U1IER[1] enables the THRE interrupt for UART1.
The status of this interrupt can be read from
U1LSR[5].
Disable the THRE interrupts.
Enable the THRE interrupts.
U1IER[2] enables the UART1 RX line status
interrupts. The status of this interrupt can be read
from U1LSR[4:1].
Disable the RX line status interrupts.
Enable the RX line status interrupts.
U1IER[3] enables the modem interrupt. The status
of this interrupt can be read from U1MSR[3:0].
Disable the modem interrupt.
Enable the modem interrupt.
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is
not defined.
Description
Note that U1IIR[0] is active low. The pending
interrupt can be determined by evaluating
U1IIR[3:1].
At least one interrupt is pending.
No interrupt is pending.
UM10120
Chapter 10: UART1
Reset value
0
0
0
0
NA
Reset value
1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
100