Philips LPC213 Series User Manual page 155

Philips Semiconductors
Volume 1
Table 132: SPI Interrupt register (S0SPINT - address 0xE002 001C) bit description
Bit Symbol
0 SPI Interrupt
Flag
7:1 -
12.5 Architecture
The block diagram of the SPI solution implemented in SPI0 interface is shown in the
Figure
SPI Interrupt
Fig 37. SPI block diagram
User manual
Description
SPI interrupt flag. Set by the SPI interface to generate an interrupt. Cleared
by writing a 1 to this bit.
Note: this bit will be set once when SPIE = 1 and at least one of SPIF and
WCOL bits is 1. However, only when the SPI Interrupt bit is set and SPI0
Interrupt is enabled in the VIC, SPI based interrupt can be processed by
interrupt handling software.
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
37.
SPI REGISTER
INTERFACE
VPB Bus
Rev. 01 — 24 June 2005
SPI SHIFT REGISTER
SCK_IN
SCK_OUT
SPI CLOCK
SS_IN
GENERATOR &
DETECTOR
SPI STATE CONTROL
SCK_OUT_EN
MOSI_OUT_EN
OUTPUT
MISO_OUT_EN
ENABLE
LOGIC
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
UM10120
Chapter 12: SPI
Reset value
0
NA
MOSI_IN
MOSI_OUT
MISO_IN
MISO_OUT
155