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Volume 1
boot block is present at addresses 0x0007 D000 to 0x0007 FFFF in all devices. ISP and
IAP commands do not allow write/erase/go operation on the boot block. Because of the
boot block, the amount of Flash available for user code and data is 500 K bytes in "512K"
devices. On the other hand, in case of the LPC2131/2/4/6 microcontroller all
32/64/128/256 K of Flash are available for user's application.
Table 192: Flash sectors in LPC2131, LPC2132, LPC2134, LPC2136 and LPC2138
Sector
Number
0
1
2
3
4
5
6
7
8
9
10 (0x0A)
11 (0x0B)
12 (0x0C)
13 (0x0D)
14 (0X0E) 32
15 (0x0F)
16 (0x10)
17 (0x11)
18 (0x12)
19 (0x13)
20 (0x14)
21 (0x15)
22 (0x16)
23 (0x17)
24 (0x18)
25 (0x19)
26 (0x1A)
20.6 Flash content protection mechanism
The LPC2131/2/4/6/8 is equipped with the Error Correction Code (ECC) capable Flash
memory. The purpose of an error correction module is twofold. Firstly, it decodes data
words read from the memory into output data words. Secondly, it encodes data words to
be written to the memory. The error correction capability consists of single bit error
correction with Hamming code.
User manual
Sector
Address Range
Size [kB]
4
0X0000 0000 - 0X0000 0FFF
4
0X0000 1000 - 0X0000 1FFF
4
0X0000 2000 - 0X0000 2FFF
4
0X0000 3000 - 0X0000 3FFF
4
0X0000 4000 - 0X0000 4FFF
4
0X0000 5000 - 0X0000 5FFF
4
0X0000 6000 - 0X0000 6FFF
4
0X0000 7000 - 0X0000 7FFF
32
0x0000 8000 - 0X0000 FFFF
32
0x0001 0000 - 0X0001 7FFF
32
0x0001 8000 - 0X0001 FFFF
32
0x0002 0000 - 0X0002 7FFF
32
0x0002 8000 - 0X0002 FFFF
32
0x0003 0000 - 0X0003 7FFF
0x0003 8000 - 0X0003 FFFF
32
0x0004 0000 - 0X0004 7FFF
32
0x0004 8000 - 0X0004 FFFF
32
0x0005 0000 - 0X0005 7FFF
32
0x0005 8000 - 0X0005 FFFF
32
0x0006 0000 - 0X0006 7FFF
32
0x0006 8000 - 0X0006 FFFF
32
0x0007 0000 - 0X0007 7FFF
4
0x0007 8000 - 0X0007 8FFF
4
0x0007 9000 - 0X0007 9FFF
4
0x0007 A000 - 0X0007 AFFF
4
0x0007 B000 - 0X0007 BFFF
4
0x0007 C000 - 0X0007 CFFF
Rev. 01 — 24 June 2005
UM10120
Chapter 20: Flash Memory
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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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