Philips LPC213 Series User Manual page 222

Philips Semiconductors
Volume 1
The operation of ECC is transparent to the running application. The ECC content itself is
stored in a flash memory not accessible by user's code to either read from it or write into it
on its own. A byte of ECC corresponds to every consecutive 128 bits of the user
accessible Flash. Consequently, Flash bytes from 0x0000 0000 to 0x0000 0003 are
protected by the first ECC byte, Flash bytes from 0x0000 0004 to 0x0000 0007 are
protected by the second ECC byte, etc.
Whenever the CPU requests a read from user's Flash, both 128 bits of raw data
containing the specified memory location and the matching ECC byte are evaluated. If the
ECC mechanism detects a single error in the fetched data, a correction will be applied
before data are provided to the CPU. When a write request into the user's Flash is made,
write of user specified content is accompanied by a matching ECC value calculated and
stored in the ECC memory.
When a sector of user's Flash memory is erased, corresponding ECC bytes are also
erased. Once an ECC byte is written, it can not be updated unless it is erased first.
Therefore, for the implemented ECC mechanism to perform properly, data must be written
into the Flash memory in groups of 4 bytes (or multiples of 4), aligned as described above.
20.7 Code Read Protection (CRP)
Code read protection is enabled by programming the flash address location 0x1FC (User
flash sector 0) with value 0x8765 4321 (2271560481 Decimal). Address 0x1FC is used to
allow some room for the fiq exception handler. When the code read protection is enabled
the JTAG debug port, external memory boot and the following ISP commands are
disabled:
The ISP commands mentioned above terminate with return code
CODE_READ_PROTECTION_ENABLED. The ISP erase command only allows erasure
of all user sectors when the code read protection is enabled. This limitation does not exist
if the code read protection is not enabled. IAP commands are not affected by the code
read protection.
Important: CRP is active/inactive once the device has gone through a power cycle.
20.8 ISP commands
The following commands are accepted by the ISP command handler. Detailed status
codes are supported for each command. The command handler sends the return code
INVALID_COMMAND when an undefined command is received. Commands and return
codes are in ASCII format.
CMD_SUCCESS is sent by ISP command handler only when received ISP command has
been completely executed and the new ISP command can be given by the host.
Exceptions from this rule are "Set Baud Rate", "Write to RAM", "Read Memory", and "Go"
commands.
User manual
•
Read Memory
•
Write to RAM
•
Go
•
Copy RAM to Flash
Rev. 01 — 24 June 2005
UM10120
Chapter 20: Flash Memory
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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