Mitsubishi Electric MELSEC-A0J2H Series Handbook page 132

7
PROGRAMS REPLACEMENT
Description
2-word data read from intelligent function/special
function modules
Interrupt disable instruction
Link refresh disable
32-bit BIN data increment
4bits groupings of 16-bit data
32-bit data transfer
Logical sums of 32-bit data
Left rotation of 32-bit data
Right rotation of 32-bit data
Left rotation of 32-bit data
Right rotation of 32-bit data
32-bit data search
1-word shift to left n-word data
1-word shift to right n-word data
32-bit data checks
2-word data write to intelligent function/special
function modules
Timing pulse generation
32-bit data conversion
32-bit non-exclusive logical sum operations
32-bit exclusive logical sum operations
Interrupt enable instruction
Link refresh enable
256  8-bit encode
Sequence program completion
Main routine program completion
Reading oldest data from tables
Writing data to the data table
Identical 16-bit data block transfers
7
- 20
: Automatic converted,
A0J2HCPU
Instruction name Instruction name Convertibility
DFRO DFRO
DFROP DFROP
DI DI
DI DI
DINC DINC
DINCP DINCP
DIS DIS
DISP DISP
DMOV DMOV
DMOVP DMOVP
DOR DOR
DORP DORP
DRCL DRCL
DRCLP DRCLP
DRCR DRCR
DRCRP DRCRP
DROL DROL
DROLP DROLP
DROR DROR
DRORP DRORP
DSER DSER
DSFL DSFL
DSFLP DSFLP
DSFR DSFR
DSFRP DSFRP
DSUM DSUM
DSUMP DSUMP
DTO DTO
DTOP DTOP
DUTY DUTY
DXCH DXCH
DXCHP DXCHP
DXNR DXNR
DXNRP DXNRP
DXOR DXOR
DXORP DXORP
EI EI
EI EI
ENCO ENCO
ENCOP ENCOP
END END
FEND FEND
FIFR FIFR
FIFRP FIFRP
FIFW FIFW
FIFWP FIFWP
FMOV FMOV
FMOVP FMOVP
×
: Partially changed, : Manual conversion required
QCPU
Reference sections
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7
Section 7.7.7