Mitsubishi Electric Melsec Q Series Programming Manual page 186

3 MOTION DEDICATED PLC INSTRUCTION
[Operation example]
When multiple D(P).DDWR instructions (5 word or more each) are executed
simultaneously before turning on each complete device in the 2 Multiple CPUs.
If the number of blocks used for each item is set as follows,
• Number of CPU dedicated instruction transmission area: 47 blocks (Initial
value)
• Maximum number of blocks used for the Multiple CPU high-speed
transmission dedicated instruction setting (For CPU No.2) (SD797): 2 (Initial
value)
• D(P).DDWR number of blocks used: 2
And, when 23 D(P).DDWR instructions are issued within the Multiple CPU high
speed transmission cycle (0.88 ms), the number of blocks used is as follows.
• 2 (D(P).DDWR number of blocks)
= 46 (Total blocks used)
Therefore, the number of empty blocks is as follows;
• 47 (Number of CPU dedicated instruction transmission area) - 46 (Total
blocks used) = 1 (Number of empty blocks)
• 1 (Number of empty blocks) < 2 (Maximum number of blocks used for the
Multiple CPU high-speed transmission dedicated instruction setting (For CPU
No.2) (SD797))
In the above case, the number of empty blocks is less than the maximum number
of blocks used for the Multiple CPU high-speed transmission dedicated
instruction setting (For CPU No.2) (SD797), therefore block information using
Multiple CPU high-speed transmission dedicated instruction (For CPU No.2)
(SM797) turns on.
If a new instruction is executed while in this status, it will be more than the
permissible number of executions. However, this can be avoided by using
SM797 as an interlock.
23 (D(P).DDWR instructions)
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