Mitsubishi Electric Melsec iQ-R Series User Manual page 144

Hart-enabled analog-digital converter module
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CH1 HART device information (final assembly number)
The final assembly number of the used HART-enabled device is stored. For details on the stored values, refer to the manual
of the used HART-enabled device.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (final assembly
number)
CH1 HART device information (date)
The date information set on the used HART-enabled device is stored.
b15 b14 b13 b12 b11 b10 b9
Un\G2556
b15 b14 b13 b12 b11 b10 b9
Un\G2557
(1) Day
(2) Month
(3) Year - 1900 (For example, 118 (2018-1900) is stored for year 2018.)
(4) Not used (Fixed to 0).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (day)
CH1 HART device information (write protect)
The write protection status of the used HART-enabled device is stored.
Stored value
0
1
250
251
252
253
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (write protect)
APPX
142
Appendix 3 Buffer Memory Areas
CH1
CH2
2554
2654
2555
2655
b8
b7
b6
(2)
b8
b7
b6
(4)
CH1
CH2
2556
2656
2557
2657
Description
No - Not write protected
Yes - Write protected
Not used
None
Unknown
Special
CH1
CH2
2558
2658
CH3
CH4
2754
2854
2755
2855
b5
b4
b3
b2
b1
b0
(1)
b5
b4
b3
b2
b1
b0
(3)
CH3
CH4
2756
2856
2757
2857
CH3
CH4
2758
2858
CH5
CH6
CH7
2954
3054
3154
2955
3055
3155
CH5
CH6
CH7
2956
3056
3156
2957
3057
3157
CH5
CH6
CH7
2958
3058
3158
CH8
3254
3255
CH8
3256
3257
CH8
3258

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