Other System Controls - Philips LPC2101 User Manual

Philips Semiconductors
Volume 1
Table 12:
Bit Symbol
0
1
2
7:3 -
APB Bus Data
GLITCH
EINTi
FILTER
EXTPOLARi
EXTMODEi
write 1 to EXTINTi
(1) See Figure 10 "Reset block diagram including the wake-up timer" on page 35
Fig 8. External interrupt logic

3.6 Other system controls

Some aspects of controlling LPC2101/02/03 operation that do not fit into peripheral or
other registers are grouped here.
User manual
External Interrupt Polarity register (EXTPOLAR - address 0xE01F C14C) bit
description
Value Description
EXTPOLAR0 0 EINT0 is low-active or falling-edge sensitive (depending on
EXTMODE0).
1 EINT0 is high-active or rising-edge sensitive (depending on
EXTMODE0).
EXTPOLAR1 0 EINT1 is low-active or falling-edge sensitive (depending on
EXTMODE1).
1 EINT1 is high-active or rising-edge sensitive (depending on
EXTMODE1).
EXTPOLAR2 0 EINT2 is low-active or falling-edge sensitive (depending on
EXTMODE2).
1 EINT2 is high-active or rising-edge sensitive (depending on
EXTMODE2).
- Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
wakeup enable
(one bit of EXTWAKE)
D Q
PCLK
1
D
reset
Rev. 01 — 12 January 2006
(one bit of EXTINT)
S
S
Q
Q
R
R
PCLK
UM10161
Chapter 3: System control block
APB Read
of EXTWAKE
EINTi to wakeup
1
timer
interrupt flag
S
Q to VIC
R
APB read of
EXTINT
PCLK
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Reset
value
0
0
0
NA
22