Prefetch Abort And Data Abort Exceptions - Philips LPC2101 User Manual

Philips Semiconductors
Volume 1
Re-mapped memory areas, including the interrupt vectors, continue to appear in their
original location in addition to the re-mapped address.
Details on re-mapping and examples can be found in
control" on page

2.3 Prefetch abort and data abort exceptions

The LPC2101/02/03 generates the appropriate bus cycle abort exception if an access is
attempted for an address that is in a reserved or unassigned address region. The regions
are:
User manual
2. Minimize the need to for the SRAM and Boot Block vectors to deal with arbitrary
boundaries in the middle of code space.
3. To provide space to store constants for jumping beyond the range of single word
branch instructions.
23.
2.0 GB
2.0 GB - 8 kB
1.0 GB
0.0 GB
Fig 5. Map of lower memory is showing re-mapped and re-mappable areas (LPC2103
with 32 kB Flash)
•
Areas of the memory map that are not implemented for a specific ARM derivative. For
the LPC2101/02/03, this is:
– Address space between on-chip Non-Volatile Memory and on-chip SRAM, labelled
"Reserved Address Space" in
address range from 0x0000 8000 to 0x3FFF FFFF, for 16 kB Flash device this is
memory address range from 0x0000 4000 to 0x3FFF FFFF, and for 8 kB Flash
device this is memory address range from 0x0000 2000 to 0x3FFF FFFF.
Rev. 01 — 12 January 2006
8 kB BOOT BLOCK
(BOOT BLOCK INTERRUPT VECTORS)
RESERVED ADDRESS SPACE
ON-CHIP SRAM
LPC2103: 8 kB ( 0x4000 2000
LPC2102: 4 kB (0x4000 1000)
LPC2101: 2 kB (0x4000 0800)
(SRAM INTERRUPT VECTORS)
RESERVED ADDRESS SPACE
32 kB ON-CHIP FLASH MEMORY
ACTIVE INTERRUPT VECTORS
FROM BOOT BLOCK
Figure 2. For 32 kB Flash device this is memory
UM10161
Chapter 2: Memory map
Section 3.7 "Memory mapping
0x7FFF FFFF
0x7FFF E000
0x4000 0000
0x0000 7FFF
0x0000 0000
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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