Mitsubishi Electric MELSEC iQ-R Series Programming Manual page 508

Hide thumbs Also See for MELSEC iQ-R Series:
Table of Contents

Advertisement

■Applicable devices
Operand
Bit
X, Y, M, L,
SM, F, B, SB,
FX, FY
(s)
(d)
(n)
• In safety programs executed by the Safety CPU, only the following safety devices and constants can be used.
Operand
Bit
SA\X, SA\Y, SA\M, SA\SM, SA\B
(s)
(d)
(n)
Processing details
• These instructions batch-transfer the (n) points of 16-bit binary data starting from the device specified by (s) to the device
specified by (d).
b15
∙∙∙
b0
(s)
1234H
(s)+1
5678H
(s)+2
7FF0H
(s)+(n)-2
6FFFH
(s)+(n)-1
553FH
• Data can be transferred even when the transfer source device and destination device overlap. A transfer to smaller device
numbers begins from the device specified by (s), and a transfer to larger device numbers begins from the device specified
by (s)+(n)-1.
• When (s) is a word device and (d) is a bit device, the number of digit-specified bits in the word device is transferred.
Ex.
When K1Y30 is specified in (d), the lower 4 bits of the word device specified by (s) are transferred.
b15
∙∙∙
(s)
D100
(s)+1
D101
(s)+2
D102
• When both (s) and (d) are bit devices, set the same number of digits for both devices.
• To use the link direct device, module access device, or CPU buffer memory access device for (s) or (d), specify it only for
one of the devices. Note that the CPU buffer memory access device (U3E0\G) of the host CPU module in which index
modification is not specified in the I/O No. specification can be specified by both (s) and (d).
Operation error
Error code
Description
(SD0)
3420H
The link direct device, module access device, or CPU buffer memory access device is specified by both (s) and (d).
However, this is not true when the CPU buffer memory access device (U3E0\G) of the host CPU module in which index modification is
not specified is specified.
6 BASIC INSTRUCTIONS
506
6.7 Data Transfer Instructions
Word
J\
T, ST, C, D, W,
SD, SW, FD, R,
ZR, RD
b15
(d)
(d)+1
(d)+2
(n)
(d)+(n)-2
(d)+(n)-1
b4
b3
b2
b1
b0
1
0
1
1
∙∙∙
0
0
1
1
(n)
0
1
1
1
U\G, J\,
Z
U3E\(H)G
Word
SA\T, SA\ST, SA\C, SA\D, SA\W, SA\SD
∙∙∙
b0
1234H
5678H
7FF0H
(n)
6FFFH
553FH
∙∙∙
(d)+2
(d)+1
(d)
Y3B
∙∙∙
Y38
Y37
∙∙∙
Y34
Y33
∙∙∙
Y30
0
1
1
1
0
0
1
1
1
0
1
1
(n)
Double word Indirect
specification
LT, LST,
LZ
LC
Constant
Others
K, H E
$
Constant
K, H

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents