Register Settings - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series

Table of Contents

Register Settings

Table 14-3 shows a bit map of the registers used by the smart card interface.

Bits indicated as 0 or 1 must be set to the value shown. The setting of other bits is described

Table 14-3 Smart Card Interface Register Settings

Note: * The CKE1 bit must be cleared to 0 when the GM bit in SMR is cleared to 0.

SMR Setting: The GM bit is cleared to 0 in normal smart card interface mode, and set to 1 in

GSM mode. The O/E bit is cleared to 0 if the IC card is of the direct convention type, and set to 1

if of the inverse convention type.

Bits CKS1 and CKS0 select the clock source of the on-chip baud rate generator. Bits BCP1 and

BCP0 select the number of basic clock periods in a 1-bit transfer interval. For details, see section

14.3.5, Clock.

The BLK bit is cleared to 0 in normal smart card interface mode, and set to 1 in block transfer

BRR Setting: BRR is used to set the bit rate. See section 14.3.5, Clock, for the method of

calculating the value to be set.

SCR Setting: The function of the TIE, RIE, TE, and RE bits is the same as for the normal SCI.

For details, see section 13, Serial Communication Interface (SCI).

Bits CKE1 and CKE0 specify the clock output. When the GM bit in SMR is cleared to 0, set these

bits to B'00 if a clock is not to be output, or to B'01 if a clock is to be output. When the GM bit in

SMR is set to 1, clock output is performed. The clock output can also be fixed high or low.