Hitachi H8S/2646 Hardware Manual page 922

REC—Receive Error Counter
Bit 7
Initial value 0
Read/Write R
TEC—Transmit Error Counter
Bit 7
Initial value 0
Read/Write R
UMSR—Unread Message Status Register
Bit 15
UMSR7
Initial value 0
Read/Write R/(W)*
Bit 7
UMSR15
Initial value 0
R/(W)*
Read/Write
Unread Message Status Flags
Note: * Only 1 can be written, to clear the flag.
890
6 5
0 0
R R
6 5
0 0
R R
14 13
UMSR6 UMSR5
0 0
R/(W)* R/(W)*
6 5
UMSR14 UMSR13
0 0
R/(W)* R/(W)*
0 [Clearing condition]
Writing 1
1 Unread receive message is overwritten by a new message
[Setting condition]
When a new message is received before RXPR is cleared
H'F818
4 3
0 0
R R
H'F819
4 3
0 0
R R
H'F81A
12 11
UMSR4 UMSR3 UMSR2
0 0
R/(W)* R/(W)*
4 3
UMSR12 UMSR11 UMSR10
0 0
R/(W)* R/(W)* R/(W)*
2 1
0 0
R R
2 1
0 0
R R
10 9
UMSR1 UMSR0
0 0
R/(W)* R/(W)* R/(W)*
2 1
UMSR9 UMSR8
0 0
R/(W)* R/(W)*
(x = 15 to 0)
HCAN
0
0
R
HCAN
0
0
R
HCAN
8
0
0
0