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TSYR—Timer Synchro Register
Bit
7
—
Initial value
0
Read/Write
—
Notes: 1.
To set synchronous operation, the SYNC bits for at least two channels must be set to 1.
2.
To set synchronous clearing, in addition to the SYNC bit , the TCNT clearing source
must also be set by means of bits CCLR2 to CCLR0 in TCR.
6
5
4
—
SYNC5
SYNC4
0
0
0
—
R/W
R/W
Timer Synchro
0
TCNTn operates independently (TCNT presetting/
clearing is unrelated to other channels)
1
TCNTn performs synchronous operation
TCNT synchronous presetting/synchronous clearing
is possible
H'FEB1
3
2
SYNC3
SYNC2
SYNC1
0
0
R/W
R/W
TPU
1
0
SYNC0
0
0
R/W
R/W
(n = 5 to 0)
1001
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