Module Stop Control Register A (Mstpcra) - Hitachi H8S/2646 Hardware Manual

10.2.10 Module Stop Control Register A (MSTPCRA)

Bit : 7
MSTPA7 MSTPA6 MSTPA5 MSTPA4 MSTPA3 MSTPA2 MSTPA1 MSTPA0
Initial value : 0
R/W : R/W
MSTPCRA is an 8-bit readable/writable register that performs module stop mode control.
When the MSTPA5 bit in MSTPCRA is set to 1, TPU operation stops at the end of the bus cycle
and a transition is made to module stop mode. Registers cannot be read or written to in module
stop mode. For details, see section 22.5, Module Stop Mode.
MSTPCRA is initialized to H'3F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 5—Module Stop (MSTPA5): Specifies the TPU module stop mode.
Bit 5
MSTPA5 Description
0 TPU module stop mode cleared
1 TPU module stop mode set
6 5
0 1
R/W R/W R/W
4 3 2
1 1 1
R/W R/W
1 0
1 1
R/W R/W
(Initial value)
335