PKDDR—Port K Data Direction Register
Bit
7
PK7DDR
Initial value
0
Read/Write
W
PHDR—Port H Data Register
Bit
7
PH7DR
Initial value
0
Read/Write
R/W
PJDR—Port J Data Register
Bit
7
PJ7DR
Initial value
0
Read/Write
R/W
PKDR—Port K Data Register
Bit
7
PK7DR
Initial value
0
Read/Write
R/W
PORTH—Port H Register
Bit
7
PH7
Initial value
—*
Read/Write
R
Note: * Determined by the state of PH7 to PH0.
954
6
5
PK6DDR
—
0
Undefined
Undefined
W
—
6
5
PH6DR
PH5DR
PH4DR
0
0
R/W
R/W
6
5
PJ6DR
PJ5DR
0
0
R/W
R/W
6
5
PK6DR
—
0
Undefined
Undefined
R/W
—
6
5
PH6
PH5
—*
—*
R
R
H'FC22
4
3
—
—
Undefined
Undefined
—
—
H'FC24
4
3
PH3DR
PH2DR
0
0
R/W
R/W
H'FC25
4
3
PJ4DR
PJ3DR
PJ2DR
0
0
R/W
R/W
H'FC26
4
3
—
—
Undefined
Undefined
—
—
H'FC28
4
3
PH4
PH3
—*
—*
R
R
2
1
—
—
Undefined
Undefined
—
—
2
1
PH1DR
PH0DR
0
0
R/W
R/W
R/W
2
1
PJ1DR
PJ0DR
0
0
R/W
R/W
R/W
2
1
—
—
Undefined
Undefined
—
—
2
1
PH2
PH1
PH0
—*
—*
—*
R
R
Port
0
—
—
Port
0
0
Port
0
0
Port
0
—
—
Port
0
R