Protection; Hardware Protection - Hitachi H8S/2646 Hardware Manual

Hitachi 16-bit single-chip microcomputer h8s/2646 series

Table of Contents

Protection

There are three kinds of flash memory program/erase protection: hardware protection, software

protection, and error protection.

Hardware protection refers to a state in which programming/erasing of flash memory is forcibly

disabled or aborted. Hardware protection is reset by settings in flash memory control register 1

(FLMCR1), flash memory control register 2 (FLMCR2), erase block register 1 (EBR1), and erase

block register 2 (EBR2). The FLMCR1, FLMCR2, EBR1, and EBR2 settings are retained in the

error-protected state. (See table 20-7.)

Table 20-7 Hardware Protection

FWE pin protection

Reset/standby

When a low level is input to the FWE pin,

FLMCR1, FLMCR2, (except bit FLER)

EBR1, and EBR2 are initialized, and the

program/erase-protected state is entered.

In a reset (including a WDT reset) and in

standby mode, FLMCR1, FLMCR2, EBR1,

and EBR2 are initialized, and the

program/erase-protected state is entered.

In a reset via the RES pin, the reset state

is not entered unless the RES pin is held

low until oscillation stabilizes after

powering on. In the case of a reset during

operation, hold the RES pin low for the

RES pulse width specified in the AC

Characteristics section.