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Programming Model
10.4.5
Port D Registers
Unlike the other ports, Port D is unique in that it is comprised of eight 8-bit I/O registers. They consist of
the following:
•
Port D direction register (PDDIR)
•
Port D data register (PDDATA)
•
Port D pull-up enable register (PDPUEN)
•
Port D select register (PDSEL)
•
Port D polarity register (PDPOL)
•
Port D interrupt request enable register (PDIRQEN)
•
Port D keyboard enable register (PDKBEN)
•
Port D interrupt request edge register (PDIRQEG)
10.4.5.1
Port D Direction Register
The Port D direction register controls the direction (input or output) of the line associated with the
PDDATA bit position. When the data bit is assigned to a dedicated I/O function by the PDSEL register, the
DIR bits are ignored. The settings for the PDDIR bit positions are shown in Table 10-17.
PDDIR
BIT 7
DIR7
TYPE
rw
0
RESET
Name
DIRx
Direction—These bits control the direction of the pins in an 8-bit sys-
Bits 7–0
tem. They reset to 0.
10-16
Port D Direction Register
6
5
DIR6
DIR5
rw
rw
0
0
Table 10-17. Port D Direction Register Description
Description
MC68VZ328 User's Manual
4
3
2
DIR4
DIR3
DIR2
rw
rw
rw
0
0
0
0x00
0x(FF)FFF418
1
BIT 0
DIR1
DIR0
rw
rw
0
0
Setting
0 = Input
1 = Output
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