External Bus Interface And Memory Map; Execution Unit Registers - Motorola DigitalDNA MPC180E User Manual

Security processor
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Chapter 3

External Bus Interface and Memory Map

This chapter describes the MPC180E address map, the External Bus Interface (EBI), and
EBI registers.

3.1 Execution Unit Registers

Each MPC180E execution unit has a dedicated set of registers. The MPC180E has a unified
memory map that allows software addressibility to all internal registers. Figure 3-1 lists
each MPC180E register and its 12-bit MPC180E chip address.
PKEU
A00
BRAM [64x32]
A40
ARAM [64x32]
A80
NRAM[64x32]
B00
EXP(k)
B01
Control [CR]
B02
Status [SR]
B03
Mask [MR]
B04
Instruction [IR]
B05
Prog. counter [PC]
B06
Clear interrupt
B07
Modulus size
B08
EXP(k) size
B09
Device ID
MDEU
000
MDMB [0–15]
010
Digest [0–4]
015
Control [CR]
016
Status [SR]
017
Clear interrupt
018
Device ID
Figure 3-1. MPC180E Execution Unit Registers
Chapter 3. External Bus Interface and Memory Map
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
DEU
200
Control
201
Status
202
Key1-right
203
Key1-left
204
Key2-right
205
Key2-left
206
Key3-right
207
Key3-left
208
IV-right
209
IV-left
20A
DATAIN_R
20B
DATAIN_L
20C
DATAOUT_R
20D
DATAOUT_L
20E
Configuration
RNG
600
Command/status
602
AutoRand output
EBI
A00
Input buffer
A80
Output buffer
B00
CSTAT
B01
ID register
B02
IMASK
B03
IBCTL
B04
IBCNT
B05
OBCTL
B06
OBCNT
AFEU
400
Control
401
Status
402
Clear interrupt
403
Key length
404
Key data[0–3]
408
Last sub msg
409
Plaintext-in
40A
Ciphertext-out
40B
Context I/J
410
Context SBox[0–63]
3-1

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