Table of Contents
Advertisement
10.4.11.3
Port M Dedicated I/O Functions
The six PMDATA lines are multiplexed with the dedicated I/O signals whose assignments are shown in
Table 10-53.
Table 10-53. Port M Dedicated I/O Function Assignments
All of the dedicated I/O functions are involved in the operation of the DRAM controller. See Chapter 7,
"DRAM Controller," for more details.
10.4.11.4
Port M Pull-up/Pull-down Enable Register
The pull-up/pull-down enable register (PMPUEN) controls the pull-up and pull-down resistors for each
line in Port M. The settings for the PMPUEN register bit positions are shown in Table 10-54.
PMPUEN
BIT 7
TYPE
RESET
Table 10-54. Port M Pull-up/Pull-down Enable Register Description
Name
Reserved
Reserved
Bits 7–6
PUx
Pull-up/Pull-down Enable—These bits enable
Bits 5–0
the pull-up and pull-down resistors on the port.
Bit
GPIO Function
0
Data bit 0
1
Data bit 1
2
Data bit 2
3
Data bit 3
4
Data bit 4
5
Data bit 5
6
7
Port M Pull-up/Pull-down Enable Register
6
5
PU5
rw
0
0
1
Description
I/O Ports
Dedicated I/O Function
SDCLK
SDCE
DQMH
DQML
SDA10
DMOE
4
3
2
PD4
PD3
PD2
rw
rw
rw
1
1
1
0x3F
Setting
These bits are reserved and should be set to 0.
0 = Pull-up and pull-down resistors are disabled
1 = Pull-up and pull-down resistors are enabled
Programming Model
0x(FF)FFF44A
1
BIT 0
PD1
PD0
rw
rw
1
1
10-39
Advertisement
Table of Contents
