Demonstration Board Operation - Xilinx MultiLINX Series Hardware User's Manual

Hardware User Guide

Demonstration Board Operation

Demonstration Designs
3-30
The following table lists the names and positions of the SW1 and SW2
switches for configuring the XC3020A and XC4003E FPGAs in a
daisy-chain from the serial PROM (multiple program).
Table 3-16 Configuring the XC3020A and XC4003E in a Daisy
Chain from the Serial PROM (Multiple Program)
Switch Name
SW1–1 INP
SW1–2 MPE
SW1–3 SPE
SW1–4 M0
SW1–5 M1
SW1–6 M2
SW1–7 MCLK
SW1–8 DOUT
X indicates don't care
This section describes how to use the XChecker download cable with
the FPGA Demonstration Board and Hardware Debugger software
for device configuration. Explicit cable connection information is
included in the "Cable Hardware" chapter.
The information in this section applies to both the XC3020A and the
XC4003E devices. However, for clarity references are only made to
the XC4003E FPGA.
Note The Parallel Cable III can also be used for FPGA configuration.
For Parallel Cable III connection information, refer to the "External
Power for the MultiLINX Cable" section of the "Cable Hardware"
chapter.
Demonstration designs are supplied with Xilinx Foundation™ and
Alliance™ Series software. You can view or edit the demonstration
designs. Before editing, you must compile the input files with your
design implementation software.
Position Switch
X SW2–1
OFF SW2–2
OFF SW2–3
ON SW2–4
ON SW2–5
ON SW2–6
ON SW2–7
ON SW2–8
Name Position
PWR X
MPE ON
SPE OFF
M0 OFF
M1 OFF
M2 OFF
RST X
INIT ON
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