Tutorials - Xilinx MultiLINX Series Hardware User's Manual

Hardware User Guide

Tutorials

3-34
3. A message window indicates that the FPGA design is loading.
When loading is complete, the Hardware Debugger indicates that
the DONE pin went High. At this point, the loaded bit file func-
tions as designed.
Tutorials are available from the Xilinx Web site and on the AppLINX
CD. (The Web site location is http://support.xilinx.com/support/
techsup/tutorials/index.htm). Please contact your local Sales Repre-
sentative for a copy of the AppLINX CD.
Calculator tutorial designs for Mentor® and Cadence are available on
the Xilinx CAE Interface CD-ROM at the following locations.
•
Mentor Tutorial on a Workstation
<CD DRIVE or server>
/mentor/tutorial/calc_4ke/calc.bit
•
Cadence Tutorial on a Workstation
<CD DRIVE or server>
/cadence/tutorial/calc_4ke/xilinx.run/calc.bit
Xilinx Development System