Multilinx Baud Rates; Multilinx Power Requirements; External Power For The Multilinx Cable - Xilinx MultiLINX Series Hardware User's Manual

Hardware User Guide

MultiLINX Baud Rates

MultiLINX Power Requirements

External Power for the MultiLINX Cable

2-8
Table 2-2 MultiLINX Pin Descriptions
Signal Name
RS (RDWR)
RDY/BUSY
Communication between your host system and the MultiLINX Cable
is dependent on host system capability. The MultiLINX Cable
supports several Baud rates.
With the USB interface, the MultiLINX Cable can run at 12 M bits/
sec. With the PC RS-232 interface, the MultiLINX Cable can run from
a 9600 baud rate to a 57.6 K baud rate.
The MultiLINX Cable gets its power from the User's circuit board.
The cable power does not come from the USB port (nor the RS-232
port). The red (PWR) and black (GND) wires from Flying Wire Set #1
are connected to the VCC (red wire) and Ground (black wire) lines of
the circuit board that is powering the Xilinx device.
The minimum input voltage to the cable is 2.5 V (.8 A). The maximum
input voltage is 5 V (.4 A).
An optional method of powering the MultiLINX Cable is to use an
external DC power supply (not supplied) as shown in the following
Function
Read Select — The RS pin repre-
sents Read Select control for the
Asynchronous Peripheral config-
uration mode on XC4000 and
XC5200 FPGAs.
Read/Write — The RDWR pin is
used as an active high READ and
an active low WRITE control
signal to the Virtex FPGA.
Busy Pin — Busy pin on the
Virtex; and RDY/Busy pin on the
XC3000, XC4000, and XC5200
FPGAs.
Xilinx Development System