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Hardware User Guide
XC3020A Components
RN10
560
INP3
J1A
+5
1
VCC
3
GND
7
CCLK
9
DONE
11
DIN
13
PROG
15
INIT
17
2
RST
J12
J9
3-18
This section describes the components on the FPGA Demonstration
Board which are for the XC3020A device. The following figure is a
schematic of the FPGA Demonstration Board utilizing this device.
+5
D1
3
8
U6
HPSP5551
5
1
9
1
2
4
6
7
0
2
4
6
8
2
4
6
8
RN11
560
1
3
5
7
1
3
5
7
44
RESET
45
D/P
46
I/O
47
XTL1
48
I/O
49
I/O
50
I/O
51
I/O
XC3020A
53
I/O
54
I/O
55
I/O
56
I/O
57
I/O
58
DIN
59
DOUT
60
CCLK
R7
27K
SW1
SPE
14
3
1
MPE
15
2
MCLK
10
7
DOUT
9
8
J5
U3
SW2
VOUT
1
1
16
1
VIN
2
PWR
5VREG
1
2
Figure 3-7 XC3020A Schematic
+5
D8
2
2
2
2
2
2
2
2
LD101VR
1
1
1
1
1
1
1
1
J1B
8
6
4
2
RN16
RT
560
RD
TRIG
7
5
3
1
8
6
4
2
RN17
560
TDI
TCK
TMS
7
5
3
1
CLKI
CLKO
26
M0/RT
25
M1/RD
24
I/O
23
I/O
22
I/O
21
I/O
20
I/O
U4
19
I/O
17
I/O
16
I/O
15
I/O
14
I/O
13
I/O
12
I/O
11
I/O
10
PWRDN
CUT
OPTION
U1
1
DATA
2
CLK
6
CEO
3
OE/R
4
CE
1765
R6
100K
+5
3
C2
C1
C3
10uF
0.1uF
0.1uF
25V
+5
1
1
1
SW1
3
2
1
RN1
1K
4
5
6
2
1
2
4
3
4
6
5
6
10
6
5
4
12
J3
14
1
RN4
16
2
4.7K
18
3
1
1
1
+5
1
1
1
1
1
SW3
6
5
4
3
2
RN5
1K
1
2
3
4
5
7
8
RN6
1K
7
8
5
6
5
6
3
4
3
4
1
2
1
2
2
3
4
5
6
3
1
RN3
1
1
1
1
1
27K
+5
R1
100K
R2
100K
C6
C5
0.1uF
0.1uF
C4
C7
C8
C9
0.1uF
0.1uF
0.1uF
0.1uF
Xilinx Development System
1
1
1
0
9
6
7
8
7
8
9
RN7
4.7K
1
1
1
X9242
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