Table 8-2 Tcm And Rcm Bit Configuration - Motorola DSP56309 User Manual

8.3.3.3 SCCR SCI Clock Prescaler (SCP) Bit 13
The SCP bit selects a divide by 1 (SCP is cleared) or divide by 8 (SCP is set) prescaler for
the clock divider. The output of the prescaler is further divided by 2 to form the SCI
clock. Either a hardware RESET signal or a software RESET instruction clears SCP.
8.3.3.4 SCCR Receive Clock Mode Source (RCM) Bit 14
RCM selects whether an internal or external clock is used for the receiver. If RCM is
cleared, the internal clock is used. If RCM is set, the external clock (from the SCLK
signal) is used. Either a hardware RESET signal or a software RESET instruction clears
RCM.
TCM RCM TX Clock
0 0 Internal
0 1 Internal
1 0 External
1 1 External
MOTOROLA

Table 8-2 TCM and RCM Bit Configuration

RX Clock
Internal
External
Internal
External
DSP56309UM/D
Serial Communication Interface (SCI)
SCLK
Signal
Output Synchronous/Asynchronous
Input Asynchronous Only
Input Asynchronous Only
Input Synchronous/Asynchronous
SCI Programming Model
Mode
8-17