ISBKPT
ISTRACE
ISDR
ISSWDBG
10.4.1
OnCE Command Register (OCR)
The OCR is an 8-bit shift register that receives its serial data from the TDI signal. It holds
the 8-bit commands to be used as input for the OnCE decoder. The OCR is shown in
Figure 10-4.
OnCE Command
Reset = $00
10.4.1.1
Register Select (RS4ÐRS0) Bits 0Ð4
The register select bits define which register is source/destination for the read/write
operation. See Table 10-4 for the OnCE register select encoding.
10.4.1.2
Exit Command (EX) Bit 5
If the EX bit is set, leave debug mode and resume normal operation. The EXIT command
is executed only if the GO command is issued, and the operation is write to OPDBR or
MOTOROLA
OnCE Command Register
OnCE Decoder
ISDEBUG
Register Read
Figure 10-3 OnCE Controller Block Diagram
OCR
7
6
Register
R/W
GO
Write Only
Figure 10-4 OnCE Command Register
DSP56309UM/D
Status and Control
Register Write
Mode Select
5
4
3
2
1
EX
RS4 RS3 RS2 RS1 RS0
On-Chip Emulation Module
OnCE Controller
Update
Register
0
AA0106
TDI
TCK
TDO
AA0704
10-5