Motorola DSP56309 User Manual page 58

24-bit digital signal processor
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Table 2-8 External Bus Control Signals (Continued)
Signal
Type
Name
TA
Input
MOTOROLA
State
During
Reset
Ignored
Transfer AcknowledgeÑIf the DSP56309 is the bus
Input
master and there is no external bus activity, or the
DSP56309 is not the bus master, the TA input is
ignored. The TA input is a data transfer
acknowledge (DTACK) function that can extend an
external bus cycle indefinitely. Any number of wait
states (1, 2,..., infinity) can be added to the wait states
inserted by the BCR by keeping TA deasserted. In
typical operation, TA is deasserted at the start of a
bus cycle, is asserted to enable completion of the bus
cycle, and is deasserted before the next bus cycle.
The current bus cycle completes one clock period
after TA is asserted synchronous to CLKOUT. The
number of wait states is determined by the TA input
or by the BCR, whichever is longer. The BCR can be
used to set the minimum number of wait states in
external bus cycles.
In order to use the TA functionality, the BCR must be
programmed to at least one wait state. A zero wait
state access cannot be extended by TA deassertion;
otherwise, improper operation can result. TA can
operate synchronously or asynchronously
depending on the setting of the TAS bit in the OMR.
You must not use TA functionality while performing
DRAM type accesses; otherwise, improper operation
can result.
DSP56309UM/D
Signal/Connection Descriptions
External Memory Expansion Port (Port A)
Signal Description
2-11

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