Motorola DSP56309 User Manual page 262

¥ Measurement input period
¥ Measurement capture
9.4.2.1 Measurement Accuracy
The external signal is synchronized with the internal clock used to increment the
counter. This synchronization process can cause the number of clocks measured for the
selected signal value to vary from the actual signal value by plus or minus one counter
clock cycle.
9.4.2.2 Measurement Input Width (Mode 4)
Bit Settings
TC3 TC2 TC1
0 1 0
In this mode, the timer counts the number of clocks that occur between opposite edges of
an input signal.
Set the TE bit to clear the counter and enable the timer. Load the timerÕs count value into
the TLR. After the first appropriate transition (as determined by the INV bit) occurs on
the TIO input signal, the counter is loaded with the TLR value on the first timer clock
signal received either from the DSP56309 clock divided by two (CLK/2) or from the
prescaler clock input. Each subsequent clock signal increments the counter.
If the INV bit is set, the timer starts on the first high-to-low (1 to 0) signal transition on
the TIO signal. If the INV bit is cleared, the timer starts on the first low-to-high
(0 to 1) transition on the TIO signal.
When the first transition opposite in polarity to the INV bit setting occurs on the TIO
signal, the counter stops. The TCF bit in the TCSR is set and a compare interrupt is
generated if the TCIE bit is set. The value of the counter (which measures the width of
the TIO pulse) is loaded into the TCR. The TCR can be read to determine the external
signal pulse width.
If the TRM bit is set, the counter is loaded with the TLR value on the first timer clock
received following the next valid transition occurring on the TIO input signal and the
count is resumed. If the TRM bit is cleared, the counter continues to be incremented on
each timer clock.
MOTOROLA
TC0 Mode
0 4 Input Width
DSP56309UM/D
Mode Characteristics
Name Function
Measurement
Triple Timer Module
Timer Operational Modes
TIO Clock
Input Internal
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