Motorola DSP56309 User Manual page 199

24-bit digital signal processor
Table of Contents

Advertisement

Enhanced Synchronous Serial Interface (ESSI)
ESSI Programming Model
7.4.7
ESSI Transmit Data Registers (TX0-2)
TX20, TX10, and TX00 are transmit data registers for ESSI0. TX21, TX11, and TX01 are
transmit data registers for ESSI1. TX20 and TX21 are known as TX2. TX10 and TX11 are
known as TX1. TX00 and TX01 are known as TX0.
TX2, TX1, and TX0 are 24-bit, write-only registers. Data to be transmitted is written into
these registers and automatically transferred to the transmit shift registers; see
Figure 7-16 on page 7-31 and Figure 7-17 on page 7-32. The data transmitted (8, 12, 16, or
24 bits) is aligned according to the value of the ALC bit. When the ALC bit is cleared, the
MSB is Bit 23. When ALC is set, the MSB is Bit 15. If the transmit data register empty
interrupt has been enabled, the DSP is interrupted whenever a transmit data register
becomes empty.
Note:
When data is written to a peripheral device, there is a two cycle pipeline delay
until any status bits affected by this operation are updated. If you read any of
those status bits within the next two cycles, the bit does not reflect its current
status. See the DSP56300 Family Manual, Appendix B, Polling a Peripheral
Device for Write for further details.
7.4.8
ESSI Time Slot Register (TSR)
TSR is effectively a write-only null data register that is used to prevent data transmission
in the current transmit time slot. For the purposes of timing, TSR is a write-only register
that behaves like an alternative transmit data register, except that, rather than
transmitting data, the transmit data signals of all the enabled transmitters are in the
high-impedance state for the current time slot.
7.4.9
Transmit Slot Mask Registers (TSMA, TSMB)
The transmit slot mask Registers are two 16-bit, read/write registers. When the TSMA or
TSMB is read to the internal data bus, the register contents occupy the two low-order
bytes of the data bus, and the high-order byte is zero-filled. In network mode, these
registers are used by the transmitter(s) to determine what action to take in the current
transmission slot. Depending on the setting of the bits, the transmitter(s) either tri-state
the transmitter(s) data signal(s) or transmit a data word and generate a transmitter
empty condition.
7-34
DSP56309UM/D
MOTOROLA

Advertisement

Table of Contents
loading

Table of Contents