Motorola DSP56309 User Manual page 73

Signal/Connection Descriptions
Enhanced Synchronous Serial Interface
Table 2-12 Enhanced Synchronous Serial Interface 0 (ESSI0) (Continued)
Signal
Name
SCK0 Input/
Output
PC3 Input or
Output
SRD0 Input/
Output
PC4 Input or
Output
2-26
State
Type During
Reset
Input
Input
DSP56309UM/D
Signal Description
Serial ClockÑSCK0 is a bidirectional
Schmitt-trigger input signal providing the
serial bit rate clock for the ESSI interface. The
SCK0 is a clock input or output used by both
the transmitter and receiver in synchronous
modes or by the transmitter in asynchronous
modes.
Although an external serial clock can be
independent of and asynchronous to the DSP
system clock, it must exceed the minimum
clock cycle time of 6 T (i.e., the system clock
frequency must be at least three times the
external ESSI clock frequency). The ESSI
needs at least three DSP phases inside each
half of the serial clock.
This signal is driven by a weak keeper after
reset.
Port C 3ÑThe default configuration
following reset is GPIO input PC3. When this
port is configured as PC3, signal direction is
controlled through PRR0. The signal can be
configured as an ESSI signal SCK0 through
PCR0.
Serial Receive DataÑSRD0 receives serial
data and transfers the data to the ESSI receive
shift register. SRD0 is an input when data is
being received.
This signal is driven by a weak keeper after
reset.
Port C 4ÑThe default configuration
following reset is GPIO input PC4. When this
port is configured as PC4, signal direction is
controlled through PRR0. The signal can be
configured as an ESSI signal SRD0 through
PCR0.
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